An output value of an analog unit is calibrated in order to correct nonuniformity in conversion characteristics between channels. As a general way of calibration of an output value of the analog unit, measurement is taken at two points to obtain an offset value and a gain value, and these two points are approximated by a straight line.
Patent Literature 1 discloses a method of compensating for nonlinearity during A/D conversion. In this method, a range from Vmin to Vmax of an input voltage to be applied to an A/D converter is divided into regions 1 and 2 with respect to a middle voltage Vc. Then, approximation is made along an approximate straight line L11 in the region 1, and along an approximate straight line L12 in the region 2.
Patent Literature 2 discloses a method of calibrating an output value of an analog unit without measuring an offset value and a gain value. In this method, a user offset value in conformity with the channel of an A/D converter unit is corrected or calculated on the basis of a factory offset value, a factory gain value and a user offset value of a source of succession, and a factory offset value and a factory gain value stored in a nonvolatile memory.
In a method disclosed in Patent Literature 3, an A/D-converted value corresponding to a digital value to be output is calculated in advance for each digital value by using a reference digital value obtained as a result of conversion of a reference analog signal by an A/D converter. Then, the A/D-converted value, and a raw digital signal obtained as a result of conversion of an analog signal by the A/D converter are compared.